Inventor · Yongin-si, KR

Si-Young Choi

88Patents
16h-index
126Co-inventors
87Inventor score

Filing activity: Aug 5, 1997 → Nov 26, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US7074662B2 Methods for fabricating fin field effect transistors using a protective layer to reduce etching damage Electricity 146 Expired
US7323710B2 Fin field effect transistors having multi-layer fin patterns Electricity 63 Expired
US8916460B1 Semiconductor device and method for fabricating the same Electricity 52 Active
US7148541B2 Vertical channel field effect transistors having insulating layers thereon Electricity 37 Expired
US8039902B2 Semiconductor devices having Si and SiGe epitaxial layers Electricity 32 Active
US7071048B2 Methods of fabricating fin field effect transistors having capping insulation layers Electricity 28 Expired
US7320908B2 Methods of forming semiconductor devices having buried oxide patterns Electricity 25 Expired
US6849520B2 Method and device for forming an STI type isolation in a semiconductor device Electricity 24 Expired
US7842566B2 FinFET and method of manufacturing the same Electricity 21 Active
US7535061B2 Fin-field effect transistors (Fin-FETs) having protection layers Electricity 19 Active
US5863835A Methods of forming electrical interconnects on semiconductor substrates Electricity 19 Expired
US8012828B2 Recess gate transistor Electricity 18 Active
US8803051B2 Microwave oven Electricity 18 Active
US7176067B2 Methods of fabricating fin field effect transistors Electricity 17 Expired
US7122871B2 Integrated circuit field effect transistors including channel-containing fin having regions of high and low doping concentrations Electricity 16 Expired
US8871104B2 Method of forming pattern, reticle, and computer readable medium for storing program for forming pattern Emerging Cross-Sectional Technologies 16 Active
US6890823B2 Methods of forming integrated circuits with thermal oxide layers on side walls of gate electrodes wherein the source and drain are higher than the gate electrode Electricity 14 Expired
US7683405B2 MOS transistors having recesses with elevated source/drain regions Electricity 12 Active
US6391749B1 Selective epitaxial growth method in semiconductor device Emerging Cross-Sectional Technologies 12 Expired
US7141456B2 Methods of fabricating Fin-field effect transistors (Fin-FETs) having protection layers Electricity 11 Expired
US8039350B2 Methods of fabricating MOS transistors having recesses with elevated source/drain regions Electricity 10 Active
US8304318B2 Methods of fabricating MOS transistors having recesses with elevated source/drain regions Electricity 10 Active
US8324043B2 Methods of manufacturing semiconductor devices with Si and SiGe epitaxial layers Electricity 10 Active
US7268396B2 Finfets having first and second gates of different resistivities Electricity 9 Expired
US8906757B2 Methods of forming patterns of a semiconductor device Electricity 9 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.