Method of fabricating silicon-based MEMS devices
US7144750B2 · kind B2 · utility
26Cited by
4References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2003 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Nov 7, 2023 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2201/0167
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of fabricating a silicon-based microstructure is disclosed, which involves depositing electrically conductive amorphous silicon doped with first and second dopants to produce a structure having a residual mechanical stress of less than +/=100 Mpa. The dopants can either be deposited in successive layers to produce a laminated structure with a residual mechanical stress of less than +/=100 Mpa or simultaneously to produce a laminated structure having a mechanical stress of less than +/=100 Mpa.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.