Semiconductor memory devices having extending contact pads and related methods
US7144798B2 · kind B2 · utility
2Cited by
12References
58Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 2003 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Mar 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device having a semiconductor substrate includes a gate structure on the semiconductor substrate. Source/drain regions are on opposite sides of the gate structure. A contact pad is on at least one of the source/drain region, and a silicide cap is on a surface of the contact pad opposite the respective source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.