Semiconductor integrated circuit device and a method of manufacturing the same
US7145194B2 · kind B2 · utility
16Cited by
12References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2004 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Apr 17, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In order to improve the soft error resistance of a memory cell of an SRAM without increasing its chip size, in deep through-holes formed by perforating a silicon oxide film, there is a silicon nitride film and a silicon oxide film, a capacitor element having a TiN film serving as a lower electrode, a silicon nitride film serving as an insulator and a TiN film as an upper electrode. This capacitor element is connected between a storage node and a supply voltage line, between a storage node and a reference voltage line, or between storage nodes of the memory cell of the SRAM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.