Systems and methods for testing a device-under-test
US7146539B2 · kind B2 · utility
2Cited by
3References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 15, 2003 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Jan 13, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/263
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for testing a device-under-test (DUT) includes examining a test data file that includes test data for testing the structure, functionality and/or performance of the DUT. The method also includes separating a first plurality of data units from a second plurality of data units contained in the test data file. The first plurality of data units correspond to a first plurality of DUT pins, and the second plurality of data units correspond to a second plurality of DUT pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.