Fixing functional errors in integrated circuits
US7146548B1 · kind B1 · utility
15Cited by
2References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2004 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Apr 26, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318541
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An arrangement that includes a core with a flaw is effectively made error free with an auxiliary circuit that interacts with input and output leads of the core, which detected occurrence of an input that causes an erroneous output at the core, and modified that output either essentially directly, or through changes in accessible core inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.