Probe tile for probing semiconductor wafer
US7148710B2 · kind B2 · utility
4Cited by
23References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 8, 2005 |
| Grant date | Dec 12, 2006 |
| Priority date | — |
| Expiry date | Mar 8, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R1/07364
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A tile used to hold one or more probes for testing a semiconductor wafer. The tile has one or more sites for inserting one or more probes to test the semiconductor wafer. Each site has one or more holes. Each hole is coupled with a slot forming an angle. A probe is inserted into the file from a top of the tile through the hole and seated on the slot. The probe has a probe tip. The probe fip is in contact with the semiconductor wafer at one end of the slot at a bottom of the file. The probe fip is aligned with an X and Y coordinates of a bond pad on the semiconductor wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.