Sharing operational amplifier between two stages of pipelined ADC and/or two channels of signal processing circuitry
US7148833B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2005 |
| Grant date | Dec 12, 2006 |
| Priority date | — |
| Expiry date | Aug 26, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/442
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A mechanism for discharging parasitic capacitance at an input of an operational amplifier, which is shared between two stages of a pipelined analog-to-digital converter and/or two channels of signal processing circuitry, before the amplifier configuration of the stages/channels is switched. The discharging act occurs when a short reset pulse is generated between two clock phases. The short reset pulse is applied to a switch connected to the operational amplifier input. When the reset pulse closes the switch, a discharge path is created and any parasitic capacitance at the operational amplifier input is discharged through the path. The discharging of the parasitic capacitance substantially mitigates the memory effect and the problems associated with the memory effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.