M-trie based packet processing
US7149216B1 · kind B1 · utility
40Cited by
31References
30Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 5, 2000 |
| Grant date | Dec 12, 2006 |
| Priority date | — |
| Expiry date | Aug 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/742
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In an embodiment, different aspects of a packet header and data included in the packet are singled out for attention, rather that just the four byte IP destination address. Different information is included in nodes of the trie that enables matching and branching on different header fields. In an embodiment, the ACL of a configuration file in a router or switch is compiled into a trie data structure located in the memory of the router or switch. In an embodiment, a trie data structure is used to map a multicast packet header by a sequence of nodes that match on destination address or source address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.