David R. Cheriton
102Patents
29h-index
15Co-inventors
87Inventor score
Filing activity: Jul 1, 1994 → May 22, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6091725A | Method for traffic management, traffic prioritization, access control, and packet forwarding in a datagram computer network | Electricity | 194 | Expired |
| US7054930B1 | System and method for propagating filters | Electricity | 168 | Expired |
| US6515963B1 | Per-flow dynamic buffer management | Electricity | 131 | Expired |
| US6377577B1 | Access control list processing in hardware | Electricity | 116 | Expired |
| US5666514A | Cache memory containing extra status bits to indicate memory regions where logging of data should occur | Physics | 106 | Expired |
| US6675200B1 | Protocol-independent support of remote DMA | Electricity | 97 | Expired |
| US6343072B1 | Single-chip architecture for shared-memory router | Electricity | 93 | Expired |
| US8504791B2 | Hierarchical immutable content-addressable memory coprocessor | Physics | 93 | Active |
| US7218632B1 | Packet processing engine architecture | Electricity | 84 | Expired |
| US8407428B2 | Structured memory coprocessor | Physics | 83 | Active |
| US5893155A | Cache memory for efficient data logging | Physics | 78 | Expired |
| US6724721B1 | Approximated per-flow rate limiting | Electricity | 77 | Expired |
| US8838656B1 | Hardware-protected reference count-based memory management using weak references | Physics | 71 | Active |
| US7002965B1 | Method and apparatus for using ternary and binary content-addressable memory stages to classify packets | Emerging Cross-Sectional Technologies | 66 | Expired |
| US7120931B1 | System and method for generating filters based on analyzed flow data | Electricity | 65 | Expired |
| US6831917B1 | Network address translation for multicast virtual sourcing | Electricity | 62 | Expired |
| US8146148B2 | Tunneled security groups | Electricity | 53 | Active |
| US6981052B1 | Dynamic behavioral queue classification and weighting | Electricity | 51 | Expired |
| US7650460B2 | Hierarchical immutable content-addressable memory processor | Physics | 47 | Active |
| US7602787B2 | Using ternary and binary content addressable memory stages to classify information such as packets | Emerging Cross-Sectional Technologies | 47 | Active |
| US7245623B1 | System and method using hierarchical parallel banks of associative memories | Electricity | 46 | Expired |
| US7310306B1 | Method and apparatus for ingress port filtering for packet switching systems | Electricity | 44 | Expired |
| US7215641B1 | Per-flow dynamic buffer management | Electricity | 42 | Expired |
| US8451817B2 | Method and apparatus for processing duplicate packets | Electricity | 40 | Active |
| US7149216B1 | M-trie based packet processing | Electricity | 40 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.