Power management for an integrated graphics device

US7149909B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ying Cui · 红钢城街道, CN
• Eric C. Samson · Folsom, US
• Ariel Berkovits · Yuvalim, IL
• Aditya Navale · Folsom, US
• David Wyatt · San Jose, US
• Leslie E. Cline · Sunnyvale, US
• Joseph W. Tsang · Corvallis, US
• Mark Blake · Gillette, US
• David I. Poisner · Folsom, US
• William A. Stevens · Folsom, US
• Vijay R. Sar-Dessai · Folsom, US

Key dates

• Filing date: May 9, 2002
• Grant date: Dec 12, 2006
• Expiry date: Dec 7, 2023

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

In one embodiment of the invention, an integrated device is described that employs a mechanism to control power consumption of a graphics memory controller hub (GMCH) through both voltage and frequency adjustment of clock signal received from a clock generator. The GMCH comprises a graphics core and a circuit to alter operational behavior, such as the frequency of a render clock signal supplied to the graphics core. The circuit is adapted to monitor idleness of the graphics core and reduce a frequency level of the render clock signal if the idleness exceeds a determined percentage of time.