Backside coating for MEMS wafer
US7153768B2 · kind B2 · utility
0Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2005 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Jun 11, 2025 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81B2201/047
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A transparent substrate has a micro electro-mechanical system (MEMS) on a first side of the substrate. An opaque layer is formed on a second side of the transparent substrate opposite the first side. The opaque layer comprises a first material that is removable by a MEMS release process. A second layer is formed on the opaque layer. The second layer comprises a second material that prevents contamination of a front end of line machine by the first material during a front end of line fabrication process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.