Compensating method for a PLL circuit that functions according to the two-point principle, and PLL circuit provided with a compensating device
US7154347B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2002 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Sep 16, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1976
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A PLL circuit is tuned to a first frequency by using a first digital modulation signal and subsequently tuned to a second frequency by using a second digital modulation signal. A differential signal, that is a function of the change in voltage of a VCO control signal generated by the modulation signals, is compared with a comparison signal, that is characteristic of the analog modulation amplitude. Based on the comparison the analog modulation amplitude is changed to minimize or substantially eliminate a deviation between the signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.