Memory fence with background lock release
US7155588B1 · kind B1 · utility
20Cited by
13References
30Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 12, 2002 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Mar 16, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/521
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique releases locks associated with particular memory locations. The technique uses a “background” approach to determining when the locks should be released in that memory operations associated with the memory locations are monitored while instructions continue to execute on a processor. The memory operations are monitored by generating a condition for each memory operation and clearing the condition when the operation completes. When all the conditions are cleared, the associated locks are released.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.