Interface for integrating reconfigurable processors into a general purpose computing system
US7155602B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 5, 2001 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | May 4, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3897
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention describes a method and system for an interface for integrating reconfigurable processors into a general purpose computing system. In particular, the system resides in a computer system containing standard instruction processors, as well as reconfigurable processors. The interface includes a command processor, a command list memory, various registers, a direct memory access engine, a translation look-aside buffer, a dedicated section of common memory, and a dedicated memory. The interface is controlled via commands from a command list that is created during compilation of a user application, or various direct commands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.