SRC Computers, LLC
38Patents
8Active
38Granted
38Portfolio score
Filing activity: Dec 17, 1997 → May 27, 2014 · 4 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6339819B1 | Multiprocessor with each processor element accessing operands in loaded input buffer and forwarding results to FIFO output buffer | Physics | 125 | Expired |
| US7124211B2 | System and method for explicit communication of messages between processes running on different nodes in a clustered multiprocessor system | Physics | 108 | Expired |
| US7299458B2 | System and method for converting control flow graph representations to control-dataflow graph representations | Physics | 102 | Expired |
| US6983456B2 | Process for converting programs in high-level programming languages to a unified executable for hybrid computing platforms | Physics | 98 | Expired |
| US7155708B2 | Debugging and performance profiling using control-dataflow graph representations with reconfigurable hardware emulation | Physics | 97 | Expired |
| US8713518B2 | System and method for computational unification of heterogeneous implicit and explicit processing elements | Physics | 74 | Active |
| US8930892B2 | System and method for computational unification of heterogeneous implicit and explicit processing elements | Physics | 70 | Active |
| US6076152A | Multiprocessor computer architecture incorporating a plurality of memory algorithm processors in the memory subsystem | Physics | 70 | Expired |
| US6964029B2 | System and method for partitioning control-dataflow graph representations | Physics | 60 | Expired |
| US7620800B2 | Multi-adaptive processing systems and techniques for enhancing parallelism and performance of computational functions | Physics | 58 | Active |
| US6356983B1 | System and method providing cache coherency and atomic memory operations in a multiprocessor computer architecture | Physics | 50 | Expired |
| US6434687B1 | System and method for accelerating web site access and processing utilizing a computer system incorporating reconfigurable processors operating under a single operating system image | Emerging Cross-Sectional Technologies | 49 | Expired |
| US6295598A | Split directory-based cache coherency technique for a multi-processor computer system | Physics | 46 | Expired |
| US7225324B2 | Multi-adaptive processing systems and techniques for enhancing parallelism and performance of computational functions | Physics | 43 | Expired |
| US7703085B2 | Process for converting programs in high-level programming languages to a unified executable for hybrid computing platforms | Physics | 35 | Active |
| US6247110A | Multiprocessor computer architecture incorporating a plurality of memory algorithm processors in the memory subsystem | Physics | 34 | Expired |
| US6594736B1 | System and method for semaphore and atomic operation management in a multiprocessor | Physics | 31 | Expired |
| US6026459A | System and method for dynamic priority conflict resolution in a multi-processor computer system having shared memory resources | Physics | 29 | Expired |
| US7155602B2 | Interface for integrating reconfigurable processors into a general purpose computing system | Physics | 25 | Expired |
| US7149867B2 | System and method of enhancing efficiency and utilization of memory bandwidth in reconfigurable hardware | Physics | 22 | Expired |
| US7680968B2 | Switch/network adapter port incorporating shared memory resources selectively accessible by a direct execution logic element and one or more dense logic devices in a fully buffered dual in-line memory module format (FB-DIMM) | Physics | 21 | Active |
| US8589666B2 | Elimination of stream consumer loop overshoot effects | Physics | 19 | Active |
| US7003593B2 | Computer system architecture and memory controller for close-coupling within a hybrid processing system utilizing an adaptive processor interface port | Physics | 16 | Expired |
| US7373440B2 | Switch/network adapter port for clustered computers employing a chain of multi-adaptive processors in a dual in-line memory module format | Physics | 15 | Expired |
| US6961841B2 | Multiprocessor computer architecture incorporating a plurality of memory algorithm processors in the memory subsystem | Physics | 14 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.