Built-in self test system and method
US7159145B2 · kind B2 · utility
10Cited by
6References
20Claims
0Family size
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Inventors
Key dates
| Filing date | May 12, 2003 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Nov 12, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5606
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
External test equipment is used to simulate an internal BIST test, thus enabling the capture or generation of detailed test results. By simulating the BIST test sequence in real time during the test, the external tester may monitor an output from the BIST and determine the exact location of failures when they occur. The external tester may generate a bit fail map indicating whether each memory location passed or failed the BIST test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.