Buried strap contact for a storage capacitor and method for fabricating it
US7163857B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2004 |
| Grant date | Jan 16, 2007 |
| Priority date | — |
| Expiry date | Sep 15, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/665
Abstract
A buried strap contact between a trench capacitor of a memory cell and the subsequently formed selection transistor of the memory cell is fabricated such that the inner capacitor electrode layer is etched back in the trench of the trench capacitor and the uncovered insulator layer is then removed at the trench wall in order to define the region of the buried strap contact area. A liner layer is subsequently deposited in order to cover the inner capacitor electrode layer in the trench and the uncovered trench wall and thus to form a barrier layer. A spacer layer with the material of the inner electrode layer is then formed on the liner layer at the trench wall. Finally, the uncovered liner layer is removed above the inner electrode layer and the trench is filled with the material of the inner electrode layer in order to fabricate the buried strap contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.