I/O circuit placement method and semiconductor device

US7165232B2 · kind B2 · utility

Assignee

• Faraday Technology Corp. · TW

Inventors

• Wang Chen · Beijing, CN
• Chen-Teng Fan · Cupertino, US
• Cheng-I Huang · Hsinchu, TW
• Ya Yun Liu · Zhubeikou, TW

Key dates

• Filing date: Dec 11, 2003
• Grant date: Jan 16, 2007
• Expiry date: Nov 9, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/10

Abstract

An I/O circuit placement method. In the I/O circuit placement method, at least two rows of I/O circuits are placed on a first side of the chip, and each I/O circuit has a head section and a tail section. The placement direction of the head section and the tail section is perpendicular to the placement direction of the I/O circuits in the rows. The semiconductor further has a core circuit disposed on the chip, wherein the rows of I/O circuits are disposed outside the core circuit and are at the periphery of the chip. Due to the I/O circuit placement in the semiconductor device, the present invention reduces the area of the semiconductor chip and fabrication cost.