Method for reducing assembly-induced stress in a semiconductor die
US7166540B2 · kind B2 · utility
1Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2005 |
| Grant date | Jan 23, 2007 |
| Priority date | — |
| Expiry date | Mar 3, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16152
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for mounting semiconductor die and integral heat spreader are disclosed. In one embodiment, thermal expansion of the integral heat spreader is restricted by physical constraints during the process of heating interface material that bonds the integral heat spreader and semiconductor die together. In an alternative embodiment, thermal expansion of the integral hat spreader is restricted by applying an external compressive force to the integral heat spreader while heating interface material that bonds the integral heat spreader and semiconductor die together.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.