Inventor · Chandler, AZ, US

Sandeep B. Sane

31Patents
5h-index
60Co-inventors
72Inventor score

Filing activity: Oct 31, 2002 → Sep 25, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US8064224B2 Microelectronic package containing silicon patches for high density interconnects, and method of manufacturing same Electricity 141 Active
US7312527B2 Low temperature phase change thermal interface material dam Electricity 13 Expired
US8441809B2 Microelectronic package containing silicon connecting region for high density interconnects, and method of manufacturing same Electricity 12 Active
US7781260B2 Methods of forming nano-coatings for improved adhesion between first level interconnects and epoxy under-fills in microelectronic packages and structures formed thereby Electricity 11 Active
US6919224B2 Modified chip attach process and apparatus Electricity 9 Expired
US7304391B2 Modified chip attach process and apparatus Electricity 3 Expired
US9368461B2 Contact pads for integrated circuit packages Electricity 3 Active
US7579213B2 Modified chip attach process Electricity 2 Active
US6788859B1 Laminate substrate containing fiber optic cables Electricity 2 Expired
US9659908B1 Systems and methods for package on package through mold interconnects Emerging Cross-Sectional Technologies 2 Active
US8941236B2 Using collapse limiter structures between elements to reduce solder bump bridging Electricity 2 Active
US9659899B2 Die warpage control for thin die assembly Electricity 2 Active
US9953934B2 Warpage controlled package and method for same Electricity 2 Active
US7901982B2 Modified chip attach process Electricity 2 Active
US11557541B2 Interconnect architecture with silicon interposer and EMIB Electricity 1 Active
US10325860B2 Microelectronic bond pads having integrated spring structures Electricity 1 Active
US8324737B2 Modified chip attach process Electricity 1 Active
US7166540B2 Method for reducing assembly-induced stress in a semiconductor die Electricity 1 Expired
US9123732B2 Die warpage control for thin die assembly Electricity 1 Active
US11417592B2 Methods of utilizing low temperature solder assisted mounting techniques for package structures Electricity 0 Active
US11901299B2 Interconnect architecture with silicon interposer and EMIB Electricity 0 Active
US12038858B2 Processor package with universal optical input/output Physics 0 Active
US10531575B2 Systems and methods for replaceable bail grid array (BGA) packages on board substrates Emerging Cross-Sectional Technologies 0 Active
US11983135B2 Electrical and optical interfaces at different heights along an edge of a package to increase bandwidth along the edge Physics 0 Active
US9394619B2 Methods of adding dopants to conductive interconnect structures in substrate technologies and structures formed thereby Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.