Non-volatile memory cell with improved programming technique
US7167392B1 · kind B1 · utility
14Cited by
5References
6Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 15, 2005 |
| Grant date | Jan 23, 2007 |
| Priority date | — |
| Expiry date | Jul 15, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0408
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory (NVM) cell splits its basic function, i.e. program, erase, read and control, among a four PMOS transistor structure, allowing independent optimization of each function. The cell structure also includes an embedded static random access memory (SRAM) cell that utilizes a latch structure to preprogram data to be written to the cell. The programming method for the cell utilizes a reverse Fowler-Nordheim tunneling mechanism with a very small programming current, allowing an entire NVM array to be programmed at one cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.