Method and system for performing a memory-mode write to cache
US7167952B2 · kind B2 · utility
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7References
14Claims
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Key dates
| Filing date | Sep 17, 2003 |
| Grant date | Jan 23, 2007 |
| Priority date | — |
| Expiry date | Jun 23, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/601
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of writing to cache including initiating a write operation to a cache. In a first operational mode, the presence or absence of a write miss is detected and if a write miss is absent, writing data to the cache and if a write miss is present, retrieving the data from a further memory and writing the data to the cache based on least recently used logic. In a second operational mode, the cache is placed in a memory mode and the data is written to the cache based on an address regardless of whether a write miss is present or absent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.