Flip-chip semiconductor package with lead frame and method for fabricating the same
US7170168B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2004 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Nov 17, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15151
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip-chip semiconductor package with a lead frame and a method for fabricating the same are provided. The lead frame has a plurality of leads, each lead having an upper surface, a lower surface, and an inner end directed toward the center of the lead frame. A recessed portion is formed on the upper surface of the inner end of each lead, making the inner end shaped as a stepped structure. The depth of the recessed portion is equal to a height of a reflow-collapsed solder bump that is for electrically connecting a chip to the lead. At least one chip is electrically connected to the leads in a flip-chip manner via a plurality of solder bumps bonded to the recessed portions. An encapsulation body is formed to encapsulate the lead frame, chip and solder bumps, with the lower surfaces of the leads being exposed from the encapsulation body.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.