Nonvolatile memory apparatus
US7170787B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2005 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Jul 15, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Current consumption in a nonvolatile memory apparatus operable on two or more different power voltages is to be substantially reduced in its standby mode. A stepped-down power supply unit provided in a flash memory to generate an internal power voltage, when supplied from outside with about 3.3 V as a power voltage, causes a first stepped-down power supply circuit to output the internal power voltage to control circuits when in normal operation. In a low power consumption mode, a second stepped-down power supply circuit outputs the internal power voltage to the control circuits, and in a standby mode a third stepped-down power supply circuit outputs to the control circuits an internal power voltage stepped down by an N-channel MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.