FIN field effect transistor with self-aligned gate
US7173303B2 · kind B2 · utility
4Cited by
12References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2003 |
| Grant date | Feb 6, 2007 |
| Priority date | — |
| Expiry date | Oct 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/673
Abstract
The present invention provides a process for fabricating a metal oxide semiconductor field effect transistor (MOSFET) having a double-gate and a double-channel wherein the gate region is self-aligned to the channel regions and the source/drain diffusion junctions. The present invention also relates to the FIN MOSFFET structure which is formed using method of the present invention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.