Semiconductor test system
US7173443B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 18, 1999 |
| Grant date | Feb 6, 2007 |
| Priority date | — |
| Expiry date | Jan 5, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31935
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A mixed signal test system for testing a semiconductor device having both an analog function and a digital function achieves improved resolution and low cost. The test system is formed of a functional test unit for testing a digital function of a device under test (DUT), an analog test unit (ATU) for testing an analog function of the DUT, and a synchronous control unit for synchronizing operations between the functional test unit and the analog test unit. The analog test unit includes a digitizer for converting an analog output of the DUT into a digital signal, and an acquisition memory for storing the digital signal from the digitizer in specified addresses. The wave form of the analog output is repeated by a plurality of cycles and a sampling clock for the digitizer is phase shifted by a predetermined amount for each cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.