Integrated circuit including memory array incorporating multiple types of NAND string structures
US7177191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2004 |
| Grant date | Feb 13, 2007 |
| Priority date | — |
| Expiry date | Mar 7, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A monolithic integrated circuit includes a memory array having first and second groups of NAND strings, each NAND string comprising at least two series-connected devices and coupled at one end to an associated global array line. NAND strings of the first and second groups differ in at least one physical characteristic, such as the number of series-connected devices forming the NAND string, but both groups are disposed in a region of the memory array traversed by a plurality of global array lines. The memory array may include a three-dimensional memory array having more than one memory plane. Some of the NAND strings of the first group may be disposed on one memory plane, and some of the NAND strings of the second group may be disposed on another memory plane. In some cases, NAND strings of both groups may share global array lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.