Patent · US Expired

Method and apparatus for entering a low power mode

US7181188B2 · kind B2 · utility

18Cited by

8References

21Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Mieu V. Vu · Austin, US
Christopher K. Y. Chun · Austin, US
Arthur M. Goldberg · Fort Lee, US
David J. Hayes · Sunrise, US
Charbel Khawand · Sammamish, US
Jianping Tao · Cedar Park, US
John J. Vaglica · Austin, US

Key dates

Filing date	Mar 23, 2004
Grant date	Feb 20, 2007
Priority date	—
Expiry date	Sep 3, 2024

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D30/70
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

A method and apparatus for entering a low power mode is provided. In one embodiment, data processing system (10) has power control circuitry (52) which may be used to control power usage in data processing system (10). Power mode select circuitry (84) may be used to select a power mode. Depending upon the power mode selected, power control circuitry (52) may use a cascaded approach to selecting which portions of data processing system (10) will be powered down, and thus how deeply data processing system (10) will be powered down.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.