Method and apparatus for placement of components onto programmable logic devices
US7181717B1 · kind B1 · utility
8Cited by
13References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2004 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | Jun 15, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for positioning components of a system onto a target device utilizing programmable logic devices (PLDs) is disclosed. A location is determined for a user defined region on the target device that allows the system to satisfy timing constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.