Manufacturing process for a flash memory and flash memory thus produced
US7183160B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2004 |
| Grant date | Feb 27, 2007 |
| Priority date | — |
| Expiry date | Jan 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
The invention relates to a production process for a flash memory from a semi-conductor substrate fitted with at least two adjacent rows of precursor stacks of floating gate transistors, the precursor stacks being at least partially covered by a protective resin and being separated by a formation zone for a source line. The process includes forming a trench in the formation zone for the source line by an attack of this zone and of the protective resin. The result of the attack step includes a deposit of residue from the resin below the precursor stacks. The residue deposit is removed. A source line is implanted in the formation zone below the precursor stacks. This process enables the time needed for erasing the memory to be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.