Via including multiple electrical paths
US7183653B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2003 |
| Grant date | Feb 27, 2007 |
| Priority date | — |
| Expiry date | Dec 31, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09827
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system includes a device having at least one integrated circuit. The integrated circuit further includes a first layer of conductive material, a second layer of conductive material, and a via having multiple electrical paths for interconnecting the first layer of conductive material and the second layer of conductive material. A method for forming a via includes drilling an opening to a depth to expose a first pad and a second pad, lining the opening with a conductive material, and insulating a first portion of the lining in the opening from a second portion of the lining in the opening to form a first electrical path contacting the first pad and a second electrical path contacting the second pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.