Low cost microelectronic circuit package
US7183658B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2001 |
| Grant date | Feb 27, 2007 |
| Priority date | — |
| Expiry date | Sep 5, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low cost microelectronic circuit package includes a single build up metallization layer above a microelectronic die. At least one die is fixed within a package core using, for example, an encapsulation material. A single metallization layer is then built up over the die/core assembly. The metallization layer includes a number of landing pads having a pitch that allows the microelectronic device to be directly mounted to an external circuit board. In one embodiment, the metallization layer includes a number of signal landing pads within a peripheral region of the layer and at least one power landing pad and one ground landing pad toward a central region of the layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.