Semiconductor device, semiconductor device testing method, and programming method
US7184338B2 · kind B2 · utility
72Cited by
13References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2005 |
| Grant date | Feb 27, 2007 |
| Priority date | — |
| Expiry date | Aug 30, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: a latch circuit that latches a given signal in a test mode; and a generating circuit that generates a signal that defines a program voltage used for programming of a memory cell in accordance with the signal latched in the latch circuit. The generating circuit includes: a circuit that generates the signal that defines an initial voltage of the program voltage; a circuit that generates the signal that defines a pulse width of the program voltage; and a circuit that generates the signal that defines a step width of the program voltage when the program voltage is a voltage that increases stepwise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.