Semiconductor component having a pn junction and a passivation layer applied on a surface
US7187058B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 16, 2004 |
| Grant date | Mar 6, 2007 |
| Priority date | — |
| Expiry date | Dec 16, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/112
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a semiconductor component having a semiconductor body (100) and at least one pn junction present in the semiconductor body (100) and an amorphous passivation layer (70) arranged at least in sections on a surface (101) of the semiconductor body (100), the following holding true for the minimum Ds,min of an interface state density Ds at the junction between the passivation layer (70) and the semiconductor body (100):where NS,Bd is the breakdown charge and Eg is the band gap of the semiconductor material used for the semiconductor body (100).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.