Hybrid mapping implementation within a non-volatile memory system
US7188228B1 · kind B1 · utility
76Cited by
37References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2003 |
| Grant date | Mar 6, 2007 |
| Priority date | — |
| Expiry date | Jun 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0246
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for allow different mapping implementations, including a many-to-one logical to physical block mapping, to be used within a memory system are disclosed. According to one aspect of the present invention, a method for mapping a plurality of logical blocks to a physical block includes identifying a first logical block meets at least one criterion. The method also includes identifying a second logical block which is substantially complementary to the first logical block, and providing contents associated with the first logical block and contents associated with the second logical block to the physical block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.