Integrated circuit on corrugated substrate
US7190050B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2005 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Jul 1, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/974
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping and “wrapped” gates can be used in conjunction with the segmented channel regions to further enhance device performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.