Semiconductor device with a vertical transistor
US7193270B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2004 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | May 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A semiconductor device which, even when a vertical transistor is adopted, is able to prevent a product yield from decreasing and performance from deteriorating, and at the same time, to achieve high-density integration of chips and high performance. The semiconductor device includes: a semiconductor substrate; a tower-like gate pillar formed on the semiconductor substrate via an insulation layer and including a channel region formed so as to be positioned between impurity diffusion regions in a vertically extended direction with respect to a principal side of the substrate; a gate insulation film formed on an outer surface of the gate pillar; and a gate electrode film including multiple conductive layers formed on an outer surface of the gate insulation film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.