Semiconductor device
US7193319B2 · kind B2 · utility
3Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2005 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Nov 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10−6/° C. to 8×10−6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.