System and method for dynamic mirror-bank addressing
US7194568B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2003 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Aug 4, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1451
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dynamic addressing technique mirrors data across multiple banks of a memory resource. Information stored in the memory banks is organized into separately addressable blocks, and memory addresses include a mirror flag. To write information mirrored across two memory banks, a processor issues a single write transaction with the mirror flag asserted. A memory controller detects that the mirror flag is asserted and, in response, waits for both memory banks to become available. At that point, the memory controller causes the write to be performed at both banks. To read data that has been mirrored across two memory banks, the processor issues a read with the mirror flag asserted. The memory controller checks the availability of both banks having the desired information. If either bank is available, the read request is accepted and the desired data is retrieved from the available bank and returned to the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.