Method and apparatus for implementing soft constraints in tools used for designing systems on programmable logic devices
US7194720B1 · kind B1 · utility
12Cited by
8References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2003 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Jul 11, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for designing a system on a target device utilizing programmable logic devices (PLDs) includes generating options for utilizing resources on the PLDs in response to user specified constraints. The options for utilizing the resources on the PLDs are refined independent of the user specified constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.