Transistor, method for producing an integrated circuit and a method of producing a metal silicide layer

US7196382B2 · kind B2 · utility

Assignee

• IHP-GmbH - Innovations for High Performance Microelectronics/Institut fur Innovative Mikroelektronik · DE

Inventors

• Dietmar Kruger · Rinteln, DE
• Rainer Kurps · Frankfurt (Oder), DE
• Jing Liu · Nanhu, CN
• Hans-Jörg Osten · Müllrose, DE
• Andriy Goryachko · Frankfurt, DE

Key dates

• Filing date: May 24, 2002
• Grant date: Mar 27, 2007
• Expiry date: May 24, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/691
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The invention relates to a method for the selective silicidation of contact areas that allow the production of highly integrated circuits, preferably in a SMOS or BiCMOS process. To this end, a metal oxide layer (14) that contains for example praseodymium oxide is deposited onto a prepared wafer (12). A silicon layer (16) and on top of said silicon layer a cover layer (18) is deposited onto the metal oxide layer (14), said cover layer being laterally structured. In a subsequent tempering step in an oxygen-free, reducing gas atmosphere the silicon layer (16) and the metal oxide layer (14) are converted to a metal silicide layer in lateral sections (20, 22) in which the cover layer (18) was previously removed.