PMOS electrostatic discharge (ESD) protection device
US7196887B2 · kind B2 · utility
8Cited by
21References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 2003 |
| Grant date | Mar 27, 2007 |
| Priority date | — |
| Expiry date | Aug 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
Abstract
A PMOS ESD protection device is disclosed in which gate and substrate coupling techniques are implemented to afford protection during positive ESD events. A snapback leg in curves capable of being produced in accordance with one or more aspects of the present invention is removed, and a trigger voltage at which the device turns on is thereby reduced so as to be less than a second voltage corresponding to a second breakdown region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.