Semiconductor integrated circuit
US7196960B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2005 |
| Grant date | Mar 27, 2007 |
| Priority date | — |
| Expiry date | Aug 5, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data breakdown due to fluctuation of an operation power source is suppressed by suppressing a sub-threshold leakage current. A semiconductor integrated circuit includes a pair of power source wires, a plurality of static memory cells, a voltage control circuit for controlling an operation voltage applied from the power source wires to the static memory cells, a monitor circuit for monitoring a voltage of the power source wires and a mode control circuit for controlling a plurality of operation modes. The monitor circuit can detect a change of decrease of a potential difference between the pair of power source wires. The voltage control circuit can execute control in such a manner as to reduce the potential difference of a pair of power source nodes of the static memory cell in response to indication of the low power consumption mode by the mode control circuit and can execute control in such a manner as to increase the potential difference of the pair of power source nodes of the static memory cell in response to detection of the decrease of the potential difference between the pair of power source wires by the monitor circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.