Integrated circuit dynamic parameter management in response to dynamic energy evaluation
US7197733B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2006 |
| Grant date | Mar 27, 2007 |
| Priority date | — |
| Expiry date | Jul 11, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2117/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A single integrated circuit (12). The integrated circuit comprises a first circuit (14x) having a data path, the first circuit consisting of a first number of logic gates for performing a plurality of logic functions. The integrated circuit also comprises a circuit (22x) for indicating a potential speed capability of the data path. The circuit for indicating comprises a second number of logic gates (82, 92) for performing the plurality of logic functions, wherein the second number is less than the first number. The circuit for indicating also comprises additional circuitry (88, 98) for representing parasitic characteristics in the data path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.