Strained finFETs and method of manufacture
US7198995B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2003 |
| Grant date | Apr 3, 2007 |
| Priority date | — |
| Expiry date | Mar 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
Abstract
A semiconductor structure and method of manufacturing is provided. The method of manufacturing includes forming shallow trench isolation (STI) in a substrate and providing a first material and a second material on the substrate. The first material and the second material form a first island and second island at an pFET region and a nFET region, respectively. A tensile hard mask is formed on the first and the second island layer prior to forming finFETs. An Si epitaxial layer is grown on the sidewalls of the finFETs with the hard mask, now a capping layer which is under tension, preventing lateral buckling of the nFET fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.