Method of maufacturing a trench-gate semiconductor device
US7199010B2 · kind B2 · utility
2Cited by
4References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2003 |
| Grant date | Apr 3, 2007 |
| Priority date | — |
| Expiry date | Dec 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a trench MOSFET includes forming a nitride liner 50 on the sidewalls 28 of a trench and a plug of doped polysilicon 26 at the bottom of a trench. The plug of polysilicon 26 may then be oxidised to form a thick oxide plug 30 at the bottom of the trench whilst the nitride liner 50 protects the sidewalls 28 from oxidation. This forms a thick oxide plug at the bottom of the trench thereby reducing capacitance between gate and drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.