Metal-filled openings for submicron devices and methods of manufacture thereof
US7199045B2 · kind B2 · utility
3Cited by
21References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 26, 2004 |
| Grant date | Apr 3, 2007 |
| Priority date | — |
| Expiry date | Oct 14, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a metal-filled opening in a semiconductor or other submicron device substrate includes forming a conductive bulk layer over the substrate surface and in the opening, wherein the conductive bulk layer has a first grain size. A conductive cap layer is formed over the conductive bulk layer, the conductive cap layer having a second grain size that is substantially smaller than the first grain size. At least one of the conductive bulk and cap layers are then planarized to form a planar surface that is substantially coincident with the substrate surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.