Diffusion barriers comprising a self-assembled monolayer
US7202159B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2004 |
| Grant date | Apr 10, 2007 |
| Priority date | — |
| Expiry date | Jul 1, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for forming a diffusion barrier layer, a diffusion barrier in an integrated circuit and an integrated circuit. The method for forming a diffusion barrier involves the following steps: 1) preparing a silicon substrate; 2) contacting the silicon substrate with a composition comprising self-assembled monolayer subunits and a solvent; and, 3) removing the solvent. The diffusion barrier layer includes a self-assembled monolayer. The integrated circuit includes a silicon substrate, a diffusion barrier layer and a metal deposited on the diffusion barrier layer. The diffusion barrier layer in the integrated circuit is covalently attached to the silicon substrate and includes a self-assembled monolayer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.