Inventor · Fishkill, NY, US

Kaushik Chanda

54Patents
10h-index
72Co-inventors
77Inventor score

Filing activity: Apr 9, 2003 → Sep 21, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US7397260B2 Structure and method for monitoring stress-induced degradation of conductive interconnects Electricity 167 Expired
US6784105B1 Simultaneous native oxide removal and metal neutral deposition method Electricity 23 Expired
US7745282B2 Interconnect structure with bi-layer metal cap Electricity 20 Active
US8056039B2 Interconnect structure for integrated circuits having improved electromigration characteristics Electricity 18 Active
US8232646B2 Interconnect structure for integrated circuits having enhanced electromigration resistance Electricity 17 Active
US9935052B1 Power line layout in integrated circuits Electricity 14 Active
US7314786B1 Metal resistor, resistor material and method Electricity 14 Active
US8120179B2 Air gap interconnect structures and methods for forming the same Electricity 13 Active
US8633707B2 Stacked via structure for metal fuse applications Electricity 12 Active
US9685404B2 Back-end electrically programmable fuse Electricity 11 Active
US7737528B2 Structure and method of forming electrically blown metal fuses for integrated circuits Electricity 10 Active
US7749778B2 Addressable hierarchical metal wire test methodology Emerging Cross-Sectional Technologies 10 Active
US8232645B2 Interconnect structures, design structure and method of manufacture Electricity 9 Active
US8420537B2 Stress locking layer for reliable metallization Electricity 9 Active
US8383507B2 Method for fabricating air gap interconnect structures Electricity 8 Active
US9142506B2 E-fuse structures and methods of manufacture Electricity 7 Active
US7830019B2 Via bottom contact and method of manufacturing same Electricity 7 Active
US8962467B2 Metal fuse structure for improved programming capability Emerging Cross-Sectional Technologies 6 Active
US7732924B2 Semiconductor wiring structures including dielectric cap within metal cap layer Electricity 5 Active
US7521952B2 Test structure for electromigration analysis and related method Physics 4 Active
US7776737B2 Reliability of wide interconnects Electricity 4 Active
US7683651B2 Test structure for electromigration analysis and related method Physics 4 Active
US7563704B2 Method of forming an interconnect including a dielectric cap having a tensile stress Electricity 4 Active
US7202159B2 Diffusion barriers comprising a self-assembled monolayer Electricity 4 Expired
US10048306B1 Methods and apparatus for automated integrated circuit package testing Physics 3 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.